Single-chip velocity measurement system for incremental optical encoders

A single chip system is designed, implemented, tested and analyzed for the measurement of velocity from incremental optical encoders with quadrature outputs. The system uses a field programmable gate array (FPGA) chip to take advantage of high flexibility and a low cost design cycle. The device uses two counting methods: period counting for low velocities and frequency counting for high velocities to obtain high resolution measurements for a wide range of velocities with a fixed 16bit word length. Verification testing of the device was consistent with predicted error and showed that quantization errors can be made arbitrarily small by adjusting the trade-off between velocity range and minimum resolution. This trade-off can be adjusted by the designer by simple modifications to the basic design. ACKNOWLEDGEMENTS This research was supported in part by the National Science Foundation Presidential Young Investigator Award to the second author. We would also like to thank Jeff Hirschberg of the University of Washington Department of Computer Science and Engineering for valuable assistance with FPGA programming techniques and equipment. 083 In Press, IEEE Transactions on Control Systems Technology, June 1997.